Rockwell-sonicrafter BT8960 User Manual

Bt8960 Single-Chip 2B1Q Transceiver The Bt8960 is a full-duplex 2B1Q transceiver based on Rockwell’s HDSL technol-ogy. It supports Nx64 kbps transmi

List of Tables Bt8960Single-Chip 2B1Q Transceiverx N8960DSB

90 4.0 Electrical & Mechanical Specifications 4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBTable 4-20. Transmi

914.0 Electrical & Mechanical Specifications4.7 Timing MeasurementsBt8960Single-Chip 2B1Q Transceiver N8960DSB4.7 Timing MeasurementsThe inpu

92 4.0 Electrical & Mechanical Specifications 4.8 Mechanical SpecificationsBt8960Single-Chip 2B1Q Transceiver N8960DSB4.8 Mechanical Specificati

934.0 Electrical & Mechanical Specifications4.8 Mechanical SpecificationsBt8960Single-Chip 2B1Q Transceiver N8960DSBFigure 4-20. 100-Pin Plast

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1 N8960DSB1.0 System Overview1.1 Functional SummaryThe Bt8960 2B1Q transceiver is an integral component of Rockwell's telecom-munications prod

2 1.0 System Overview 1.1 Functional SummaryBt8960Single-Chip 2B1Q Transceiver N8960DSBThe Bt8960 comprises five major functions: a transmit sectio

31.0 System Overview1.1 Functional SummaryBt8960Single-Chip 2B1Q Transceiver N8960DSB1.1.1 Transmit SectionThe source of transmitted symbols is

4 1.0 System Overview 1.1 Functional SummaryBt8960Single-Chip 2B1Q Transceiver N8960DSB1.1.4 Microcomputer InterfaceThe Microcomputer Interface

51.0 System Overview1.2 ApplicationsBt8960Single-Chip 2B1Q Transceiver N8960DSB1.2 Applications1.2.1 Voice/Data PairgainA well-established mar

6 1.0 System Overview 1.2 ApplicationsBt8960Single-Chip 2B1Q Transceiver N8960DSB1.2.2 Internet Connectivity TransportThe growth of the Internet

71.0 System Overview1.2 ApplicationsBt8960Single-Chip 2B1Q Transceiver N8960DSB1.2.3 ISDN Basic Rate Interface ConcentratorSince many telecommu

8 1.0 System Overview 1.3 Pin DescriptionsBt8960Single-Chip 2B1Q Transceiver N8960DSB1.3 Pin DescriptionsThe Bt8960 is packaged in a 100-Pin Plas

91.0 System Overview1.3 Pin DescriptionsBt8960Single-Chip 2B1Q Transceiver N8960DSBTable 1-1. Pin DescriptionsPin Pin Label I/O Pin Pin Label I/

Copyright © 1997 Rockwell Semiconductor Systems, Inc. All rights reserved.Print date: December 1997Rockwell Semiconductor Systems, Inc. reserves the

10 1.0 System Overview 1.3 Pin DescriptionsBt8960Single-Chip 2B1Q Transceiver N8960DSBTable 1-2. Hardware Signal Definitions (1 of 4)Pin Label Si

111.0 System Overview1.3 Pin DescriptionsBt8960Single-Chip 2B1Q Transceiver N8960DSBChannel Unit Interface RQ[1]/RDATRQ[0]/ BCLKReceive Quat 1/ R

12 1.0 System Overview 1.3 Pin DescriptionsBt8960Single-Chip 2B1Q Transceiver N8960DSBAnalog Transmit InterfaceTXP, TXN Transmit Positive, Negativ

131.0 System Overview1.3 Pin DescriptionsBt8960Single-Chip 2B1Q Transceiver N8960DSBTest and Diagnostic InterfaceTDI JTAG Test Data InputI JTAG t

14 1.0 System Overview 1.3 Pin DescriptionsBt8960Single-Chip 2B1Q Transceiver N8960DSB

15 N8960DSB2.0 Functional Description2.1 Transmit SectionThe transmit section is illustrated in Figure 2-1. It comprises four major func-tions: a s

16 2.0 Functional Description 2.1 Transmit SectionBt8960Single-Chip 2B1Q Transceiver N8960DSB2.1.1 Symbol Source Selector/ScramblerThe input sou

172.0 Functional Description2.1 Transmit SectionBt8960Single-Chip 2B1Q Transceiver N8960DSBThe bit stream is converted into symbols for the four-

18 2.0 Functional Description 2.1 Transmit SectionBt8960Single-Chip 2B1Q Transceiver N8960DSB2.1.2 Variable Gain Digital-to-Analog ConverterA fo

192.0 Functional Description2.2 Receive SectionBt8960Single-Chip 2B1Q Transceiver N8960DSB2.2 Receive SectionLike the transmit section, the rece

iii N8960DSB Table of Contents List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

20 2.0 Functional Description 2.2 Receive SectionBt8960Single-Chip 2B1Q Transceiver N8960DSB2.2.2 Analog-to-Digital ConverterThe ADC provides 16

212.0 Functional Description2.2 Receive SectionBt8960Single-Chip 2B1Q Transceiver N8960DSB2.2.3.1 DigitalFront-EndPrior to the main signal proce

22 2.0 Functional Description 2.2 Receive SectionBt8960Single-Chip 2B1Q Transceiver N8960DSB2.2.3.2 OffsetAdjustmentA nonzero DC level on the inp

232.0 Functional Description2.2 Receive SectionBt8960Single-Chip 2B1Q Transceiver N8960DSB2.2.4 Echo CancelerThe EC removes images of the trans

24 2.0 Functional Description 2.2 Receive SectionBt8960Single-Chip 2B1Q Transceiver N8960DSB2.2.5.2 Feed ForwardEqualizer (FFE)The Feed Forward E

252.0 Functional Description2.2 Receive SectionBt8960Single-Chip 2B1Q Transceiver N8960DSB2.2.6.2 Peak Detector(PKD)The PKD is only used during

26 2.0 Functional Description 2.2 Receive SectionBt8960Single-Chip 2B1Q Transceiver N8960DSBThe LFSR operates in the same way in both cases, excep

272.0 Functional Description2.2 Receive SectionBt8960Single-Chip 2B1Q Transceiver N8960DSBThe SNR alarm provides a rapid indication of impulse no

28 2.0 Functional Description 2.3 Timing Recovery and Clock InterfaceBt8960Single-Chip 2B1Q Transceiver N8960DSB2.3 Timing Recovery and Clock Int

292.0 Functional Description2.3 Timing Recovery and Clock InterfaceBt8960Single-Chip 2B1Q Transceiver N8960DSB2.3.0.7 TimingRecovery CircuitThe

Table of Contents Bt8960 Single-Chip 2B1Q Transceiver iv N8960DSB 2.2.4 Echo Canceler. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

30 2.0 Functional Description 2.4 Channel Unit InterfaceBt8960Single-Chip 2B1Q Transceiver N8960DSB2.4 Channel Unit InterfaceThe quaternary signa

312.0 Functional Description2.4 Channel Unit InterfaceBt8960Single-Chip 2B1Q Transceiver N8960DSBParallel slave mode uses RBCLK and TBCLK inputs

32 2.0 Functional Description 2.5 Microcomputer InterfaceBt8960Single-Chip 2B1Q Transceiver N8960DSB2.5 Microcomputer InterfaceThe microcomputer

332.0 Functional Description2.5 Microcomputer InterfaceBt8960Single-Chip 2B1Q Transceiver N8960DSB2.5.2.1 RAM AccessRegistersThe internal RAMs o

34 2.0 Functional Description 2.5 Microcomputer InterfaceBt8960Single-Chip 2B1Q Transceiver N8960DSB2.5.4 ResetThe reset input (RST) is an activ

352.0 Functional Description2.5 Microcomputer InterfaceBt8960Single-Chip 2B1Q Transceiver N8960DSBA prescaler may precede the timer. This increas

36 2.0 Functional Description 2.6 Test and Diagnostic Interface (JTAG)Bt8960Single-Chip 2B1Q Transceiver N8960DSB2.6 Test and Diagnostic Interfac

37 N8960DSB3.0 Registers3.1 ConventionsUnless otherwise noted, the following conventions apply to all applicable register descriptions:• For storag

Registers Register SummaryBt8960Single-Chip 2B1Q Transceiver38 N8960DSB3.2 Register SummaryTable 3-1. Register Table (1 of 6)ADDR(hex)RegisterLabe

RegistersRegister SummaryBt8960Single-Chip 2B1Q Transceiver 39 N8960DSB0x0F reserved2 R/W D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]0x10 sut1_low R/W D[7

Table of Contents Bt8960 Single-Chip 2B1Q Transceiver v N8960DSB 3.2.10 0x09—Nonlinear Echo Canceller Modes Register (nonlinear_ec_modes) . . . . .

Registers Register SummaryBt8960Single-Chip 2B1Q Transceiver40 N8960DSB0x23 reserved10 R/W D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]0x24 pll_phase_offs

RegistersRegister SummaryBt8960Single-Chip 2B1Q Transceiver 41 N8960DSB0x38 dagc_target_low R/W D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]0x39 dagc_targe

Registers Register SummaryBt8960Single-Chip 2B1Q Transceiver42 N8960DSB0x4C ber_meter_low R/W D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]0x4D ber_meter_h

RegistersRegister SummaryBt8960Single-Chip 2B1Q Transceiver 43 N8960DSB0x7A eq_microcode_add_read R/W — — D[5] D[4] D[3] D[2] D[1] D[0]0x7B eq_microco

44 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.1 0x00—Global Modes and Status Register (global_modes)hw_revision[3

453.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSBsmon[5:0] Serial Monitor Source Select—Read/write binary field selects the

46 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.4 0x03—Interrupt Mask Register High (mask_high_reg)Independent read

473.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.6 0x05—IRQ Source Register (irq_source)Independent read/write (zero

48 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.8 0x07—Receive Phase Select Register (receive_phase_select)rphs[3:0

493.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSBzero_output Zero Output—Read/write control bit which, when set, zeros the

Table of Contents Bt8960Single-Chip 2B1Q Transceivervi N8960DSB3.2.49 0x46, 0x47—Signal Level Meter Register (slm_low, slm_high). . . . . . . . . . .

50 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.11 0x0A—Decision Feedback Equalizer Modes Register (dfe_modes)adapt

513.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSBdata_source[2:0]Transmitter Mode000 Isolated pulse. Level selected by isol

52 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.13 0x0C—Timer Restart Register (timer_restart)Independent read/writ

533.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.15 0x0E—Timer Continuous Mode Register (timer_continuous)Independent

54 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.22 0x20—Test Register (reserved9)A 1-byte read/write register used

553.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.26 0x21—ADC Control Register (adc_control)loop_back[1,0] Loopback C

56 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.27 0x22—PLL Modes Register (pll_modes)clk_freq[1,0] Clock Frequenc

573.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.28 0x23—Test Register (reserved10)A 3-byte read/write register used

58 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.32 0x29—Transmitter Gain Register (tx_gain)tx_gain[3:0] Transmit G

593.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.33 0x2A, 0x2B—Noise-Level Histogram Threshold Register (noise_histog

List of FiguresBt8960Single-Chip 2B1Q Transceiver vii N8960DSBList of FiguresFigure 1-1. 2B1Q Terminal . . . . . . . . . . . . . . . . . . . . . . . .

60 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.38 0x34, 0x35—SNR Alarm Threshold Register (snr_alarm_th_low, snr_a

613.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.41 0x3A—Symbol Detector Modes Register (detector_modes)enable_peak_d

62 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSBnot be cleared while lfsr_lock remains high.) After 128 cycles, if the th

633.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.44 0x3D—Feed Forward Equalizer Modes Register (ffe_modes)adapt_last_

64 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.46 0x40, 0x41—Phase Detector Meter Register (pdm_low, pdm_high)A 2-

653.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.49 0x46, 0x47—Signal Level Meter Register (slm_low, slm_high)A 2-byt

66 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.52 0x4C, 0x4D—Bit Error Rate Meter Register (ber_meter_low, ber_met

673.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.55 0x5E, 0x5F— PLL Frequency Register (pll_frequency_low, pll_freque

68 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.59 0x73—NEC Write Tap Select Register (nonlinear_ec_tap_select_writ

693.0 Registers3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.63 0x77—Scratch Pad Write Tap Select (sp_tap_select_write)A 6-bit re

List of Figures Bt8960Single-Chip 2B1Q Transceiverviii N8960DSB

70 3.0 Registers 3.1 ConventionsBt8960Single-Chip 2B1Q Transceiver N8960DSB3.2.65 0x79—Equalizer Write Select Register (eq_add_write)A 6-bit read/

71 N8960DSB4.0 Electrical & Mechanical Specifications4.1 Absolute Maximum RatingsStresses above those listed may cause permanent damage to the

72 4.0 Electrical & Mechanical Specifications 4.2 Recommended Operating ConditionsBt8960Single-Chip 2B1Q Transceiver N8960DSB4.2 Recommended O

734.0 Electrical & Mechanical Specifications4.3 Electrical CharacteristicsBt8960Single-Chip 2B1Q Transceiver N8960DSB4.3 Electrical Character

74 4.0 Electrical & Mechanical Specifications 4.4 Clock TimingBt8960Single-Chip 2B1Q Transceiver N8960DSB4.4 Clock TimingTable 4-4. External

754.0 Electrical & Mechanical Specifications4.4 Clock TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBTable 4-6. Symbol Clock (QCLK) Switchi

76 4.0 Electrical & Mechanical Specifications 4.5 Channel Unit Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSB4.5 Channel Unit Int

774.0 Electrical & Mechanical Specifications4.5 Channel Unit Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSB Table 4-9. Channel

78 4.0 Electrical & Mechanical Specifications 4.5 Channel Unit Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBTable 4-11. Channel

794.0 Electrical & Mechanical Specifications4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSB4.6 Microcomputer In

List of TablesBt8960Single-Chip 2B1Q Transceiver ix N8960DSBList of TablesTable 1-1. Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . .

80 4.0 Electrical & Mechanical Specifications 4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBTable 4-14. Microco

814.0 Electrical & Mechanical Specifications4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBFigure 4-6. MCI Writ

82 4.0 Electrical & Mechanical Specifications 4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBFigure 4-8. MCI Rea

834.0 Electrical & Mechanical Specifications4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBFigure 4-10. Interna

84 4.0 Electrical & Mechanical Specifications 4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSB4.6.1 Test and Dia

854.0 Electrical & Mechanical Specifications4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBFigure 4-11. JTAG In

86 4.0 Electrical & Mechanical Specifications 4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSB4.6.2 Analog Speci

874.0 Electrical & Mechanical Specifications4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBTable 4-18. Transmit

88 4.0 Electrical & Mechanical Specifications 4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSBFigure 4-13. Transm

894.0 Electrical & Mechanical Specifications4.6 Microcomputer Interface TimingBt8960Single-Chip 2B1Q Transceiver N8960DSB4.6.3 Test Conditio